1. Field of the Invention
The present invention relates to a high-frequency, high power semiconductor device, and more particularly, to a semiconductor device which is used in a high-frequency to range of 800 MHz or higher.
2. Description of the Related Art
A high power FET has generally a structure in which FET cells, each formed by one set of a gate electrode, a drain electrode and a source electrode, are arranged parallel to each other. When an electrode width Wgu is made wider and the number of FET cells is increased to thereby extend an overall gate width Wgt, a high power output is obtained.
However, widening of the electrode width Wgu gives rise to a problem that a source inductance Ls increases and a maximum gain of the FET becomes small. While an alternative to this is to connect a plurality of FETs by an external synthesis circuit without increasing the number of FET cells included in the FETs to thereby obtain a high power output while preventing a drop in FETs' maximum gain, when a synthesis circuit is externally disposed, a problem of increased costs arises.
There is another problem that since all gate electrodes are connected with one or more gate wires in a high power FET, the circuit can not be stabilized in the units of cells or cell blocks which are groups of cells and the FET oscillates in an internal loop.